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IEEE Micro
September/October 2004
http://www.computer.org/micro/

Features

Guest Editors' Introduction: Network Processors for Future High-End Systems
and Applications
Ioannis Papaefstathiou, Nikos A. Nikolaou, Bharat Doshi, and Eric Grosse

Synchronous Dataflow Architecture for Network Processors
Jakob Carlstr?m and Thomas Bod?n

PRO3: A Hybrid NPU Architecture
Ioannis Papaefstathiou, Stylianos Perissakis, Theofanis G. Orphanoudakis,
Nikos A. Nikolaou, George Kornaros, Nicholas A. Zervos, George
Konstantoulakis, Dionisios N. Pnevmatikatos, and Kyriakos Vlachos

NePSim: A Network Processor Simulator with a Power Evaluation Framework
Yan Luo, Jun Yang, Laxmi N. Bhuyan, and Li Zhao

NP-Click: A Productive Software Development Approach for Network Processors
Niraj Shah, William Plishker, Kaushik Ravindran, and Kurt Keutzer

Optimization and Benchmark of Cryptographic Algorithms on Network
Processors
Zhangxi Tan, Chuang Lin, Hao Yin, and Bo Li

Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor
Systems, Part 2
Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough


Columns and Departments

Editor in Chief's Message
Communication versus computation

Micro Law
Vicarious liability for infringement

Micro Economics
Creative destruction and deconstruction

Micro Review
Seek and show


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